Petrify

Petrify: Open-Source Asynchronous Circuit Synthesizer Tool

Petrify is an open-source tool for synthesizing asynchronous circuits. It takes a specification of a asynchronous circuit as input and outputs a netlist that implements the desired function using common asynchronous elements like C-elements and handshake components.

What is Petrify?

Petrify is an open-source logic synthesis and optimization tool specifically designed for asynchronous circuits. It accepts input specifications of asynchronous circuits in various formats like STGs (Signal Transition Graphs) and BURST-MODE specifications and synthesizes an optimized netlist using a library of common asynchronous components.

Some key features of Petrify include:

• Optimization of hazards and critical races in the circuits
• Minimization of circuit area and power consumption
• Support for different circuit families like micropipelines, QDI (Quasi-Delay Insensitive) and more
• Flexibility in choosing different libraries of basic asynchronous components
• Output netlists compatible with common EDA tools for further processing and simulation

Petrify has been under development since 1996 at the Universitat Politecnica de Catalunya in Spain and has been used extensively in research on asynchronous circuit design. It produces high quality results and the optimized netlists can lead to better performance asynchronous circuits. The tool is available for free download under the GNU GPL license.

Petrify Features

Official Links