Description: SureLog is an open-source structural Verilog and SystemVerilog lint, semantic check and automated formal verification tool. It can help detect bugs and ensure adherence to coding guidelines in Verilog/SystemVerilog designs.
Type: software
Pricing: Open Source
Description: Sysinfo is a free, open source system information and monitoring tool for Windows. It provides detailed information about hardware, software, and network components in an easy to read graphical interface.
Type: software
Pricing: Free